Makefile

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Makefile is text file that is read if executing make command. make is Command that performs compile in the order determined automatically, even if there are various files as C language source code. On Eos, commands are summarized by using make, and perform large-scale works (Single particle analysis or Electron tomography ...). On purpose of distributed environment, stream processing, and improvement of the degree of freedom of the input and output, we are developing POINE as make of next generation.

Makefile on Eos

part of Makefile

When performing 3D Reconstruction on Eos, if number of files is a large amount, It is necessary to a great deal of effort in how to enter Commands one at a time. In order to reduce this effort, make command is used in many cases on Eos. And knowledge of shell script is also required in order to understand the makefile.


.ref3d.red2d: (1)
        mrc3Dto2D -i $*.ref3d -o $*.ref2d -EulerMode YOYS InterpolationMode 0 -Rot1 0 359 $(STEP) -Rot2 0 359 $(STEP) -Rot3 0 0 $(STEP) -m 1

For example, when there is a Makefile as described above,

$ make EM.ref2d

If you execute as above the make command, it looks for a line that generates the extension .ref2d and performs automatically.

This time, it means that a part (1) generates .ref2d file from .ref3d file, thus it performs command as the following.

mrc3Dto2D -i $*.ref3d -o $*.ref2d -EulerMode YOYS InterpolationMode 0 -Rot1 0 359 $(STEP) -Rot2 0 359 $(STEP) -Rot3 0 0 $(STEP) -m 1

As meaning that this row belongs to the previous (1), Tab blank is inserted at the beginning. Thus, as long as there is a Tab blank, it means that it belongs to X.

In addtion, Makefile that makes make is able to performing to multiple works by only one make command like the following. Thus, Makefile is a necessity in works (as 3D Reconstruction) that requires multiple steps.

All::
       make $(TARGET).ref3d;
       make $(TARGET).ref2d;
       make AVGs;
       make -j $(JOP_NUM) corinfo;
       make CORINFOs;
       make $(TARGET).ds6;

Cautions on writing a Makefile

Differences from the shell script

Sentences in makefile are basically the same as those in shell scripts, but some are different. This is because makefile executes its commands (shell scripts) line by line. Below we describe the points related to this difference.

Variable

A value of a variable is kept only within one line. When a command is written in several lines, ; and \ should be included (see an example below). When a variable is used in the shell script, the variable (for example variable i) is written like $i (not i). However, in Makefile, it is written with duplicated $, like $$i.

	i=1 ; \
	echo "$$i"


Control sentences and loop sentences

Control sentences and loop sentences should have their ends within a line, like

if [ (conditions) ]; then (processing); fi


When (conditions) or (processing)are long, use of \, as a continuation character, is compulsory for good readability.


if [ (condition 1) ]; then \
	(processA); \
	if [ (condition 2) ]; then \
		(process B); \
	fi; \
	(process C); \
fi



for (( i=0; i<5; i++ )); \
do \
	echo "$$i"; \
done

When writing this sort of sentence, use of #, as a commenting out character, needs a special attention. Lines after # will be also commented out against your expectation. This could lead unexpected results, therefore, again be careful in using # in those cases.

for (( i=0; i<5; i++ )); \
do \
	echo "$$i"; \
#	echo "Test"; \
done

In this example, done is commented out. This leads to an error.